Generating dependencies for gcc

I'm writing a Makefile to compile a very long project. Basicaly, I've defined the all objects I need. The problem comes when I need to generate the dependencies. I'm doing something like this:

a.o: $( $(CXX) -MM $(INCLUDE) A/a.cpp | sed 's/a.o: //')
 $(CXX) $(CXXFLAGS) $(INCLUDES) A/a.cpp

b.o: $( $(CXX) -MM $(INCLUDE) A/b.cpp | sed 's/b.o: //')
 $(CXX) $(CXXFLAGS) $(INCLUDES) A/b.cpp

libab.a: a.o b.o
 $(LXX) $(LXXFLAGS) libab.a a.o b.o

The output of $(CXX) -MM $(INCLUDE) A/a.cpp | sed 's/a.o: //' lists all dependencies that a.cpp needs to be compilated so I'm trying to put the output of this command like dependencies when I'm declaring the object but it's not working.

Do you have an idea about how to do it?

Thanks.