I just took over a GCC project containing a makefile that has way to many include folders and source files listed. I started removing one by one and verified by compiling, but wondered, is there some way of looking at the compiled output (map files for instance?) and compare that to the makefile to clean out unnecessary files?
I'm not saying this will make any difference to the finished project, but I like to quickly look at the Makefile to see what this project involves. Now it looks like it involves "everything"