Greenhills link script to Gcc link script porting for ARM target

I have one application was compiled with Greenhills compiler before, I am trying to use arm-Gcc compiler to compile it, when I try to link the objects with link script (.LD), I got syntax error. I know the link command are different in Greenhills and arm-Gcc, I am trying to find the equivalent ones in Gcc but failed now. I list my Greenhills LD file below and what I tired to change for GCC. Any comments and suggestions are appreciated. Thanks

GHS ld file :

MEMORY {
  INIT_SRAM                : ORIGIN = 0x34400000, LENGTH = 0x1FB000
  INIT_SRAM_NO_CACHEABLE   : ORIGIN = 0x3460A000, LENGTH = 0x1DF00
  INIT_SRAM_STACK          : ORIGIN = 0x34628000, LENGTH = 0x15000
  RAM_RSVD               : ORIGIN = .,          LENGTH = 0
  BOOT_TEST           : ORIGIN = 0x43840000  LENGTH = 0x50    
}
SECTIONS 
{
.boot_test                                         : > BOOT_TEST 
.exception_table                             ALIGN(4)   : > INIT_SRAM
.startup                                     ALIGN(4)   : > .
.ramcode                                    ABS ALIGN(4) : > .

_placeholder_start_address_stack         : > INIT_SRAM_STACK

.TEST_SESSION :> .
_TEST_SESSION_START = ADDR(.TEST_SESSION);
_TEST_SESSION_END = ENDADDR(.TEST_SESSION) - 1;
_Stack_start                       = .;
__STACK_SIZE                     = SIZEOF(INIT_SRAM_STACK);
__RAM_NO_CACHEABLE_START      = ADDR(INIT_SRAM_NO_CACHEABLE);

}

Gcc LD file I create:

MEMORY {
  INIT_SRAM                : ORIGIN = 0x34400000, LENGTH = 0x1FB000
  INIT_SRAM_NO_CACHEABLE   : ORIGIN = 0x3460A000, LENGTH = 0x1DF00
  INIT_SRAM_STACK          : ORIGIN = 0x34628000, LENGTH = 0x15000
  RAM_RSVD               : ORIGIN = .,          LENGTH = 0
  BOOT_TEST           : ORIGIN = 0x43840000  LENGTH = 0x50    
}
SECTIONS 
{
.boot_test                                         : {*(.boot_test)}> BOOT_TEST 
.exception_table                             ALIGN(4)   : > {*(.exception_table)}>INIT_SRAM
.startup                                     ALIGN(4)   : {*(.startup)}
.ramcode                                    ABS ALIGN(4) : > {*(.ramcode)} /*Don't find ABS flag in GCC */


_placeholder_start_address_stack         : > INIT_SRAM_STACK /*Have no idea how to change */


_TEST_SESSION_START = .;
.TEST_SESSION :{*(.TEST_SESSION)}
_TEST_SESSION_END = (. - 1);  

_Stack_start                       = .;
__STACK_SIZE                     = SIZEOF(INIT_SRAM_STACK);
__RAM_NO_CACHEABLE_START      = ADDR(INIT_SRAM_NO_CACHEABLE);

}