riscv cross compiler error: invalid -march= option: `rv64imafdc_zicsr'

I'm new to the world of gcc.I don't know if this is the right place to post, but I'm having some issues that are really annoying.

I've created a Unix-like system, and although it's not very complete yet, I want to make a cross-compilation chain for it so that I can use some open source c libraries.

I modify these files:

config.sub, fixincludes/mkfixinc.sh, config.gcc, gcc/config/caffeinix.h, libgcc/config.host

But after I compiled gcc, I ran into problems when I ran it.I tried to compile a test file (it has nothing but the main function), but I got the following error:

❯ ./riscv64-caffeinix-gcc -o test test.cAssembler messages:Fatal error: invalid -march= option: `rv64imafdc_zicsr'

And anything is generated.....

How can I get rid of it?

Information I can provide:

Host: Ubuntu 22.04

Newlib (compiled by myself): 2.5.0

And the compiled gcc information:

❯ ./riscv64-caffeinix-gcc -march=rv64gc -Q --help=targetThe following options are target specific:-mabi= lp64d-malign-data= xlen-march= rv64imafdc_zicsr_zifencei-mbig-endian [disable]-mbranch-cost=N 3-mcmodel= medlow-mcpu=PROCESSOR-mcsr-check [disable]-mdiv [enable]-mexplicit-relocs [enable]-mfdiv [enable]-minline-atomics [enable]-misa-spec= 20191213-mlittle-endian [enable]-mplt [enable]-mpreferred-stack-boundary= 0-mrelax [enable]-mriscv-attribute [enable]-msave-restore [disable]-mshorten-memrefs [enable]-msmall-data-limit=N 8-mstack-protector-guard-offset=-mstack-protector-guard-reg=-mstack-protector-guard= global-mstrict-align [enable]-mtune=PROCESSOR rocketSupported ABIs (for use with the -mabi= option):ilp32 ilp32d ilp32e ilp32f lp64 lp64d lp64fKnown encoding models (for use with the -mcmodel= option):medany medlowSupported ISA specs (for use with the -misa-spec= option):2.2 20190608 20191213Known data alignment choices (for use with the -malign-data= option):natural xlen Valid arguments to -mstack-protector-guard=: global tls Known valid arguments for -mcpu= option: sifive-e20 sifive-e21 sifive-e24 sifive-e31 sifive-e34 sifive-e76 sifive-s21 sifive-s51 sifive-s54 sifive-s76 sifive-u54 sifive-u74 thead-c90 6 Known valid arguments for -mtune= option: rocket sifive-3-series sifive-5-series sifive-7-series thead-c906 size sifive-e20 sifive-e21 sifive-e24 sifive-e31 sifive-e34 sifive-e76 sifive-s21 sifive-s51 sifive-s54 sifive-s76 sifive-u54 sifive-u74 thead-c906Assembler messages:Fatal error: invalid -march= option: `rv64gc'❯ ./riscv64-caffeinix-gcc -vUsing built-in specs.COLLECT_GCC=./riscv64-caffeinix-gcc COLLECT_LTO_WRAPPER=/home/troy/repo/riscv-toolchain/riscv-gnu-toolchain/bin-gcc/libexec/gcc/riscv64-caffeinix/13.2.0/lto-wrapper target: riscv64-caffeinix configured as: ../gcc/configure --target=ris cv64-caffeinix --prefix=/home/troy/repo/riscv-toolchain/riscv-gnu-toolchain/bin-gcc/ --with-sysroot=/home/troy/repo/riscv-toolchain/bin-newlib/ --enable-languages=c --with-headers=/home/troy/repo/riscv-toolchain/bin-newlib/riscv64-caffeinix/include --with-arch=rv64imafdc --with-abi=lp64d --with-tune=rocket --with-isa-spec=20191213 --with-newlibThreading model: singleSupported LTO compression algorithm: zlibgcc version 13.2.0 (GCC)

Thanks for any response and help!

Best regards.

Troy.